SN74LVC841APWR, Latches 10bit Interface
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см. техническую документацию
см. техническую документацию
680 руб.
от 10 шт. —
550 руб.
от 100 шт. —
433 руб.
от 250 шт. —
380.06 руб.
1 шт.
на сумму 680 руб.
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от 0 руб. × 4 платежа
от 0 руб. × 4 платежа
Описание
Semiconductors\Logic ICs\Latches
Latch Transparent 3-ST 10-CH D-Type 24-Pin TSSOP T/R
Технические параметры
| Brand: | Texas Instruments |
| Factory Pack Quantity: Factory Pack Quantity: | 2000 |
| High Level Output Current: | -24 mA |
| Logic Family: | 74LV |
| Logic Type: | True |
| Low Level Output Current: | 32 mA |
| Manufacturer: | Texas Instruments |
| Maximum Operating Temperature: | +85 C |
| Minimum Operating Temperature: | -40 C |
| Mounting Style: | SMD/SMT |
| Number of Channels: | 10 Channels |
| Number of Circuits: | 8 |
| Number of Input Lines: | 10 Line |
| Number of Output Lines: | 3 Line |
| Operating Supply Voltage: | 1.65 V to 3.6 V |
| Output Type: | 3-State |
| Package / Case: | TSSOP-24 |
| Polarity: | Non-Inverting |
| Product Category: | Latches |
| Product Type: | Latches |
| Propagation Delay Time: | 7.5 ns at 2.7 V, 6.7 ns at 3.3 V |
| Quiescent Current: | 10 uA |
| Reset Type: | No Reset |
| Series: | SN74LVC841A |
| Subcategory: | Logic ICs |
| Supply Voltage - Max: | 3.6 V |
| Supply Voltage - Min: | 1.65 V |
| Type: | D-Type |
| Absolute Propagation Delay Time (ns) | 8.6 |
| Automotive | No |
| Bus Hold | No |
| ECCN (US) | EAR99 |
| EU RoHS | Compliant |
| Latch Mode | Transparent |
| Lead Shape | Gull-wing |
| Logic Family | LVC |
| Maximum High Level Output Current (mA) | -24 |
| Maximum Low Level Output Current (mA) | 24 |
| Maximum Operating Supply Voltage (V) | 3.6 |
| Maximum Operating Temperature (°C) | 85 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 6.7@3.3V|7.5@2.7V |
| Maximum Quiescent Current (uA) | 10 |
| Minimum Operating Supply Voltage (V) | 1.65 |
| Minimum Operating Temperature (°C) | -40 |
| Mounting | Surface Mount |
| Number of Channels per Chip | 10 |
| Number of Elements per Chip | 1 |
| Number of Input Enables per Element | 1 |
| Number of Inputs per Chip | 10 |
| Number of Output Enables per Element | 1 |
| Number of Outputs per Chip | 10 |
| Number of Selection Inputs per Element | 0 |
| Output Type | 3-State |
| Packaging | Tape and Reel |
| Part Status | Active |
| PCB changed | 24 |
| Pin Count | 24 |
| Polarity | Non-Inverting |
| PPAP | No |
| Process Technology | CMOS |
| Propagation Delay Test Condition (pF) | 50 |
| Set/Reset | No |
| Standard Package Name | SOP |
| Supplier Package | TSSOP |
| Supplier Temperature Grade | Commercial |
| Tolerant I/Os (V) | 5 |
| Type | D-Type |
| Typical Operating Supply Voltage (V) | 2.5|1.8|3.3 |
| Вес, г | 0.09 |
Дополнительная информация
Калькуляторы группы «Логические - Регистры-защелки»
Типы корпусов импортных микросхем
