AD9653BCPZ-125

AD9653 is a quad, 16bit, 125MSPS analogue-to-digital converter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power, small size and ease of use. The product operates at a conversion rate of up to 125MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical. The ADC requires a single 1.8V power supply and LVPECL-/CMOS-/LVDS -compatible sample rate clock for full performance operation. No external reference or driver components are required for many applications. The ADC automatically multiplies the sample rate clock for the appropriate LVDS serial data rate. A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) for signalling a new output byte are provided. Typical application includes medical ultrasound and MRI, high speed imaging, quadrature radio receivers, diversity radio receivers and test equipment.

• 1.8V supply operation
• Low power of 164mW per channel at 125MSPS
• SNR of 76.5/77.5dBFS at 70MHz (2.0/2.6V p -p input span)
• SFDR of 90dBc (to Nyquist, 2Vp -p I/P span) and DNL of ±0.7LSB and INL of ±3.5LSB (2Vp-p I/P span)
• Serial LVDS (ANSI -644, default) and low power, reduced range option (similar to IEEE 1596.3)
• 650MHz full power analogue bandwidth
• 2Vp-p input voltage range (supports up to 2.6V p -p)
• Full chip and individual channel power -down modes and flexible bit orientation
• Built-in and custom digital test pattern generation, multichip sync and clock divider
• 48 lead LFCSP package, operating temperature range from -40°C to 85°C